Lot Header
Include lot ID, device, wafer count, technology node, priority, start date, and owner.
4.8
on G2
Free Semiconductor & Electronics Template
Track wafer lot routing, recipes, holds, and signoffs for [process flow]
Use this template to track wafer lot routing, recipes, holds, and signoffs for [process flow].
| Field | Details |
|---|---|
| Category | Semiconductor & Electronics |
| Owner | [Team or owner] |
| Version | [Version number] |
| Effective Date | [Date] |
| Review Cycle | [Monthly / Quarterly / Annual / Event-based] |
| Status | [Draft / In Review / Approved] |
Include lot ID, device, wafer count, technology node, priority, start date, and owner.
| Item | Details | Owner | Status |
|---|---|---|---|
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
[Add context, assumptions, exceptions, evidence links, screenshots, calculations, or reviewer comments.]
State fab area, route revision, mask set, and special instructions.
| Item | Details | Owner | Status |
|---|---|---|---|
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
[Add context, assumptions, exceptions, evidence links, screenshots, calculations, or reviewer comments.]
Table operation, tool group, recipe, parameter limits, required data, and operator signoff.
| Item | Details | Owner | Status |
|---|---|---|---|
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
[Add context, assumptions, exceptions, evidence links, screenshots, calculations, or reviewer comments.]
Define metrology, defect inspection, electrical test, sample size, and acceptance criteria.
| Item | Details | Owner | Status |
|---|---|---|---|
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
[Add context, assumptions, exceptions, evidence links, screenshots, calculations, or reviewer comments.]
List mandatory engineering holds, MRB triggers, and release authority.
| Item | Details | Owner | Status |
|---|---|---|---|
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
[Add context, assumptions, exceptions, evidence links, screenshots, calculations, or reviewer comments.]
Specify MES fields, SPC charts, attachments, and retention needs.
| Item | Details | Owner | Status |
|---|---|---|---|
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
[Add context, assumptions, exceptions, evidence links, screenshots, calculations, or reviewer comments.]
Document pass, scrap, rework, split lot, or engineering evaluation criteria. Use semiconductor manufacturing terminology and precise process controls.
| Item | Details | Owner | Status |
|---|---|---|---|
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
| [Item or requirement] | [Describe the relevant detail, evidence, or decision] | [Owner] | [Open / Complete] |
[Add context, assumptions, exceptions, evidence links, screenshots, calculations, or reviewer comments.]
Document review conclusions, approvals, unresolved items, and next review date.
| Role | Name | Date | Notes |
|---|---|---|---|
| Preparer | [Name] | [Date] | [Notes] |
| Reviewer | [Name] | [Date] | [Notes] |
| Approver | [Name] | [Date] | [Notes] |
Template Structure
Use this semiconductor & electronics template as a starting point, then customize each section to match your internal workflow, evidence, and signoff needs.
Include lot ID, device, wafer count, technology node, priority, start date, and owner.
State fab area, route revision, mask set, and special instructions.
Table operation, tool group, recipe, parameter limits, required data, and operator signoff.
Define metrology, defect inspection, electrical test, sample size, and acceptance criteria.
List mandatory engineering holds, MRB triggers, and release authority.
Specify MES fields, SPC charts, attachments, and retention needs.
Document pass, scrap, rework, split lot, or engineering evaluation criteria. Use semiconductor manufacturing terminology and precise process controls.
Write a wafer process traveler. Structure with these Markdown sections:
Include lot ID, device, wafer count, technology node, priority, start date, and owner.
State fab area, route revision, mask set, and special instructions.
Table operation, tool group, recipe, parameter limits, required data, and operator signoff.
Define metrology, defect inspection, electrical test, sample size, and acceptance criteria.
List mandatory engineering holds, MRB triggers, and release authority.
Specify MES fields, SPC charts, attachments, and retention needs.
Document pass, scrap, rework, split lot, or engineering evaluation criteria.
Use semiconductor manufacturing terminology and precise process controls.
Device: PMIC-88
Wafer Count: 24
Node: 90 nm BCD
Route: BCD90-R12
| Op | Area | Tool Group | Recipe | Required Data |
|---|---|---|---|---|
| 110 | Diffusion | Furnace F3 | OX-900A | Oxide thickness |
| 220 | Litho | Stepper S2 | POLY-L1 | Alignment offset |
| 330 | Etch | Plasma E5 | POLY-ETCH-7 | Endpoint trace |
After Op 220, measure overlay on 5 wafers, 9 sites each. Acceptance limit: <= 38 nm mean plus 3 sigma.
Engineering hold required after Op 330 for first article review of endpoint traces.
Release to implant only after SPC charts are in control and hold is cleared in MES.
Record a walkthrough, training session, or process demonstration. Docsie AI turns it into structured documentation using this template as the starting framework.
Use the template manually, or let Docsie generate the first draft from source footage.
Track die attach, wire bond, mold, singulation, inspection, and release steps for IC assembly
Define device burn-in loading, stress conditions, monitoring, unload, and disposition
Define gowning, behavior, and contamination controls for [cleanroom area]
Create a concise semiconductor device datasheet with ratings, electrical characteristics, timing, and package data
Define electrostatic discharge controls for [electronics line/lab/fab area]
Control semiconductor or electronics product, process, test, material, or documentation changes
Template FAQ
Common questions about using and generating a wafer Process Traveler.
Q: What is a wafer Process Traveler?
A: A wafer Process Traveler is a structured document for track wafer lot routing, recipes, holds, and signoffs for [process flow].
Q: Can I download this wafer Process Traveler as Word or PDF?
A: Yes. This page includes free downloads in DOCX, PDF, and Markdown formats so you can edit, share, or import the template into your documentation system.
Q: Can Docsie generate this from a video?
A: Yes. Upload a process walkthrough, training recording, or screen capture to Docsie, then use this template structure to generate a first draft automatically.